CY24271 Datasheet - Cypress Semiconductor

CY24271 Clock Generator

For a complete list of related documentation, click here. Logic Block Diagram /B YPA SS EN Bypass MUX REFCLK,REFC LKB PLL EN RegA EN RegB EN RegC CLK0 CLK0B CLK1 CLK1B CLK2 CLK2B EN RegD CLK3 CLK3B SCL SDA ID0 ID1 Cypress Semiconductor Corporation * 198 Champion Court Document N.

CY24271 Features

* Meets Rambus Extended Data Rate (XDR™) clocking requirements

* 25 ps typical cycle-to-cycle jitter

* 135 dBc/Hz typical phase noise at 20 MHz offset

* 100 or 133 MHz differential clock input

* 300

* 800 MHz high speed clock support

* Quad (open drain) differential o

CY24271 Datasheet (699.91 KB)

CY24271 Datasheet Preview — Preview of CY24271 PDF

Datasheet Details

Part number:

CY24271

Manufacturer:

Cypress Semiconductor

File Size:

699.91 KB

Description:

Clock generator.

📁 Related Datasheet

CY24272 Rambus XDR Clock Generator (Cypress Semiconductor)

CY24212 MediaClock MPEG Clock Generator (Cypress Semiconductor)

CY24239 Spread Spectrum Frequency Timing Generator (Cypress Semiconductor)

CY24292 Four Outputs PCI-Express Clock Generator (Cypress Semiconductor)

CY24293 Two Outputs PCI-Express Clock Generator (Cypress)

CY2410 MPEG Clock Generator (Cypress Semiconductor)

CY24119 MediaClock 27-MHz VCXO Clock Generator (Cypress Semiconductor)

CY2412 MPEG Clock Generator (Cypress)

TAGS

CY24271 Clock Generator Cypress Semiconductor

CY24271 Distributor