CY28351 Datasheet, Buffer/driver, Cypress Semiconductor

CY28351 Features

• Buffer/driver
• Supports 333-MHz and 400-MHz DDR SDRAM
• 60-
    – 200-MHz operating frequency
• Phase-locked loop (PLL) clock distribution for double data rate sy

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Part number:

CY28351

Manufacturer:

Cypress Semiconductor

File Size:

71.38kb

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📄 Datasheet

Description:

Differential clock buffer/driver. This PLL clock buffer is designed for 2.5-VDD and 2.5-AVDD operation and differential outputs levels. This device is a zero delay buf

CY28351 Application

• Applications
• Distributes one clock input to ten differential outputs
• External feedback pin (FBIN) is used to synchronize the out

TAGS

CY28351

Cypress Semiconductor

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