Part number:
CY28351
Manufacturer:
Cypress Semiconductor
File Size:
71.38 KB
Description:
Differential clock buffer/driver.
CY28351-CypressSemiconductor.pdf
Datasheet Details
This PLL clock buffer is designed for 2.5-VDD and 2.5-AVDD operation and differential outputs levels.
This device is a zero delay buffer that distributes a clock input (CLKIN) to ten differential pairs of clock outputs (YT[0:9], YC[0:9]) and one feedback clock output (FBOUT).
The clock outputs are i
CY28351 Features
* Supports 333-MHz and 400-MHz DDR SDRAM
* 60-
* 200-MHz operating frequency
* Phase-locked loop (PLL) clock distribution for double data rate synchronous DRAM applications
* Distributes one clock input to ten differential outputs
* External feedback p
CY28351-CypressSemiconductor.pdf
Datasheet Details
CY28351
Cypress Semiconductor
71.38 KB
Differential clock buffer/driver.
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