CY7C2665KV18 - 144-Mbit QDR II+ SRAM Four-Word Burst Architecture
CY7C2665KV18 Features
* Separate independent read and write data ports
* Supports concurrent transactions
* 550-MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz
