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CY7C2665KV18, CY7C2663KV18 144-Mbit QDR II+ SRAM Four-Word Burst Architecture

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Description

CY7C2663KV18/CY7C2665KV18 144-Mbit QDR® II+ SRAM Four-Word Burst Architecture (2.5 Cycle Read Latency) with ODT 144-Mbit QDR® II+ SRAM Four-Word Burs.

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This datasheet PDF includes multiple part numbers: CY7C2665KV18, CY7C2663KV18. Please refer to the document for exact specifications by model.
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Datasheet Specifications

Part number
CY7C2665KV18, CY7C2663KV18
Manufacturer
Cypress Semiconductor
File Size
1.20 MB
Datasheet
CY7C2663KV18-CypressSemiconductor.pdf
Description
144-Mbit QDR II+ SRAM Four-Word Burst Architecture
Note
This datasheet PDF includes multiple part numbers: CY7C2665KV18, CY7C2663KV18.
Please refer to the document for exact specifications by model.

Features

* Separate independent read and write data ports
* Supports concurrent transactions
* 550-MHz clock for high bandwidth
* Four-word burst for reducing address bus frequency
* Double data rate (DDR) interfaces on both read and write ports (data transferred at 1100 MHz) at 550 MHz

CY7C2665KV18 Distributors

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Cypress Semiconductor CY7C2665KV18-like datasheet