DMP1007UCB9 Datasheet - DIODES

DMP1007UCB9 P-CHANNEL MOSFET

This 3rd generation Lateral MOSFET (LD-MOS) is engineered to minimize on-state losses and switch ultra-fast, making it ideal for high efficiency power transfer. It uses Chip-Scale Package (CSP) to increase power density by combining low thermal impedance with minimal RDS(ON) per footprint area. Appl.

DMP1007UCB9 Features

* LD-MOS Technology with the Lowest Figure of Merit:

* RDS(ON) = 5.7mΩ to Minimize On-State Losses

* Qg = 8.2nC for Ultra-Fast Switching

* VGS(TH) = -0.6V Typ. for a Low Turn-On Potential

* CSP with Footprint 1.5mm  1.5mm

* Height = 0.62mm for Low Profile

* ESD Protectio

DMP1007UCB9 Datasheet (502.69 KB)