74AUP1G86 Datasheet (Diodes) - SINGLE 2-INPUT EXCLUSIVE-OR GATE

74AUP1G86, SINGLE 2-INPUT EXCLUSIVE-OR GATE

The Advanced, Ultra Low Power (AUP) CMOS logic family is designed for low power and extended battery life in portable applications.

Pin Assignments The 74AUP1G86 is a single, two-input, positive exclusive-OR gate with a standard push-pull output designed for operation over a power supply range of

74AUP1G86 Features

* Advanced Ultra Low Power (AUP) CMOS

* Supply Voltage Range from 0.8V to 3.6V

* ± 4mA Output Drive at 3.0V

* Low Static Power Consumption ICC < 0.9µA

* Low Dynamic Power Consumption CPD = 6.3pF (Typical at 3.6V)

* Schmitt Trigger Action at all inputs