Download Datasheet (602.24 KB)
M12L128168A-5BG
ESMT
602.24 KB
2m x 16 bit x 4 banks synchronous dram.
ESMT
SDRAM
FEATURES
y JEDEC standard 3.3V power supply y LVTTL compatible with multiplexed address y.
The M12L128168A is 134,217,728 bits synchronous high data rate Dynamic RAM organized as 4 x 2,097,15.
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y JEDEC standard 3.3V power supply y LVTTL patible with multiplexed address y Four banks operation y MRS cycle with address key.
M12L128168A-5BG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
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JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key program.
M12L128168A-5BVAG2N - Synchronous DRAM
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JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVAG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
(ESMT)
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JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVG2N - Synchronous DRAM
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JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
M12L128168A-5BVG2S - 2M x 16 Bit x 4 Banks Synchronous DRAM
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JEDEC standard 3.3V power supply LVTTL patible with multiplexed address Four banks operation MRS cycle with address key.
