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M12L2561616A-5BG2S Datasheet - ESMT

Synchronous DRAM

M12L2561616A-5BG2S Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave)

* All inputs are sampled at the positiv

M12L2561616A-5BG2S General Description

The M12L2561616A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst.

M12L2561616A-5BG2S Datasheet (1.66 MB)

Preview of M12L2561616A-5BG2S PDF

Datasheet Details

Part number:

M12L2561616A-5BG2S

Manufacturer:

ESMT

File Size:

1.66 MB

Description:

Synchronous dram.

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M12L2561616A-5BG2S Synchronous DRAM ESMT

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