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M12L2561616A-7BG2S, M12L2561616A Datasheet - ESMT

M12L2561616A-7BG2S Synchronous DRAM

The M12L2561616A is 268,435,456 bits synchronous high data rate Dynamic RAM organized as 4 x 4,194,304 words by 16 bits. Synchronous design allows precise cycle control with the use of system clock I/O transactions are possible on every clock cycle. Range of operating frequencies, programmable burst.

M12L2561616A-7BG2S Features

* JEDEC standard 3.3V power supply

* LVTTL compatible with multiplexed address

* Four banks operation

* MRS cycle with address key programs - CAS Latency (2 & 3) - Burst Length (1, 2, 4, 8 & full page) - Burst Type (Sequential & Interleave)

* All inputs are sampled at the positiv

M12L2561616A_EliteSemiconductor.pdf

This datasheet PDF includes multiple part numbers: M12L2561616A-7BG2S, M12L2561616A. Please refer to the document for exact specifications by model.
M12L2561616A-7BG2S Datasheet Preview Page 2 M12L2561616A-7BG2S Datasheet Preview Page 3

Datasheet Details

Part number:

M12L2561616A-7BG2S, M12L2561616A

Manufacturer:

ESMT

File Size:

1.66 MB

Description:

Synchronous dram.

Note:

This datasheet PDF includes multiple part numbers: M12L2561616A-7BG2S, M12L2561616A.
Please refer to the document for exact specifications by model.

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M12L2561616A-7BG2S M12L2561616A Synchronous DRAM ESMT

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