Description
ESMT DDR II SDRAM M14D1G1664A (2P) 8M x 16 Bit x 8 Banks DDR II SDRAM .
Pin Name
A0~A12, BA0~BA2
DQ0~DQ15 RAS CAS WE VSS VDD
DQS, DQS (LDQS, LDQS UDQS, UDQS)
ODT
NC
Function
Address inputs - Row address A0~A12 - Column a.
Features
* JEDEC Standard
* VDD = 1.8V ± 0.1V, VDDQ = 1.8V ± 0.1V
* Internal pipelined double-data-rate architecture; two data access per clock cycle
* Bi-directional differential data strobe (DQS, DQS ); DQS can be disabled for single-ended data strobe operation.
* On-chip DLL
* Diff
