The 1Gb Double-Data-Rate-3(L), DDR3(L) DRAM is double data rate architecture to achieve high-speed operation.
It is internally configured as an eight bank DRAM.
The 1Gb chip is organized as 8Mbit x 16 I/Os x 8 bank devices.
These synchronous devices achieve high speed double-data-rate transfer rates
M15T1G1664A-BDBG2C Features
* and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a differential DQS pair in a source synchronous fashion. These de
Datasheet Details
M15T1G1664A-BDBG2C, M15T1G1664A
ESMT
7.20 MB
Ddr3 sdram.
This datasheet PDF includes multiple part numbers: M15T1G1664A-BDBG2C, M15T1G1664A.
Please refer to the document for exact specifications by model.
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