M15T5121632A - 4M x 16-Bit x 8 Banks DDR3 SDRAM
The 512Mb Double-Data-Rate-3 (DDR3(L)) DRAM is double data rate architecture to achieve high-speed operation.
It is internally configured as an eight-bank DRAM.
The 512Mb chip is organized as 4Mbit x 16 I/Os x 8 bank devices.
These synchronous devices achieve high speed double-data-rate transfer rat
M15T5121632A Features
* and all of the control and address inputs are synchronized with a pair of externally supplied differential clocks. Inputs are latched at the cross point of differential clocks (CK rising and CK falling). All I/Os are synchronized with a differential DQS pair in a source synchronous fashion. These de
