EDD2504AKTA - 256M bits DDR SDRAM (64M words x 4 bits)
The EDD2504AK is a 256M bits Double Data Rate (DDR) SDRAM organized as 16,777,216 words × 4 bits × 4 banks.
Read and write operations are performed at the cross points of the CK and the /CK.
This highspeed data transfer is realized by the 2 bits prefetchpipelined architecture.
Data strobe (DQS) both
EDD2504AKTA Features
* Power supply : VDDQ = 2.5V ± 0.2V : VDD = 2.5V ± 0.2V
* Data rate: 333Mbps/266Mbps (max.)
* Double Data Rate architecture; two data transfers per clock cycle
* Bi-directional, data strobe (DQS) is transmitted /received with data, to be used in capturing data at the
