EDE1108AJBG Datasheet - Elpida Memory

EDE1108AJBG 1G bits DDR2 SDRAM

DATA SHEET 1G bits DDR2 SDRAM EDE1108AJBG (128M words × 8 bits) EDE1116AJBG (64M words × 16 bits) Specifications Density: 1G bits Organization  16M words × 8 bits × 8 banks (EDE1108AJBG)  8M words × 16 bits × 8 banks (EDE1116AJBG) Package  60-ball FBGA (EDE1108AJBG)  84-ball FBGA (EDE1116AJBG)  Lead-free (RoHS compliant) and Halogen-free Power supply: VDD, VDDQ = 1.8V ± 0.1V Data rate  800Mbps (max.) 1KB page size (EDE1108AJBG) .

EDE1108AJBG Features

* Double-data-rate architecture; two data transfers per clock cycle

* The high-speed data transfer is realized by the 4 bits prefetch pipelined architecture

* Bi-directional differential data strobe (DQS and /DQS) is transmitted/received with data for capturing data at the re

EDE1108AJBG-ElpidaMemory.pdf