74ACT125 Datasheet - Fairchild Semiconductor

74ACT125 Quad Buffer

The ACT125 is an high-speed CMOS QUAD BUS BUFFERS fabricated with sub-micron silicon gate and double-layer metal wiring C2MOS technology. It is ideal for low power applications maintaining high speed operation similar to PIN CONNECTION AND IEC LOGIC SYMBOLS May 1997 1/8 74ACT125 INPUT AND OUTPUT.

74ACT125 QUAD BUS BUFFERS (3-STATE) PRELIMINARY DATA s s s s s s s s s HIGH SPEED: tPD = 6.5 ns (TYP.) at VCC = 5V LOW POWER DISSIPATION: ICC = 8 µA (MAX.) at TA = 25 oC COMPATIBLE WITH TTL OUTPUTS VIH = 2V (MIN), VIL = 0.8V (MAX) 50Ω TRANSMISSION LINE DRIVING CAPABILITY SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 24 mA (MIN) BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL OPERATING VOLTAGE RANGE: VCC (OPR) = 4.5V to 5.5V PIN AND FUNCTION COMPATIBLE WITH 74 SERIES 125 IMPROVED LATCH-UP IMMUNITY.

74ACT125 Datasheet (299.17 KB)