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NDP6020P

P-Channel Logic Level Enhancement Mode Field Effect Transistor

NDP6020P Features

* -24 A, -20 V. RDS(ON) = 0.05 Ω @ VGS= -4.5 V. RDS(ON) = 0.07Ω @ VGS= -2.7 V. RDS(ON) = 0.075 Ω @ VGS= -2.5 V. Critical DC electrical parameters specified at elevated temperature. Rugged internal source-drain diode can eliminate the need for an external Zener diode transient suppressor. 175°C maximum

NDP6020P General Description

These logic level P-Channel enhancement mode power field effect transistors are produced using Fairchild's proprietary, high cell density, DMOS technology. This very high density process has been especially tailored to minimize on-state resistance, provide superior switching performance, and withsta.

NDP6020P Datasheet (62.16 KB)

Preview of NDP6020P PDF

Datasheet Details

Part number:

NDP6020P

Manufacturer:

Fairchild

File Size:

62.16 KB

Description:

P-channel logic level enhancement mode field effect transistor.

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TAGS

NDP6020P P-Channel Logic Level Enhancement Mode Field Effect Transistor Fairchild

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