MB85RS2MT Datasheet - Fujitsu

MB85RS2MT 2M (256K x 8) Bit SPI

MB85RS2MT is a FRAM (Ferroelectric Random Access Memory) chip in a configuration of 262,144 words × 8 bits, using the ferroelectric process and silicon gate CMOS process technologies for forming the nonvolatile memory cells. MB85RS2MT adopts the Serial Peripheral Interface (SPI). The MB85RS2MT is ab.

MB85RS2MT Features

* Bit configuration : 262,144 words × 8 bits

* Serial Peripheral Interface : SPI (Serial Peripheral Interface) Correspondent to SPI mode 0 (0, 0) and mode 3 (1, 1)

MB85RS2MT-Fujitsu.pdf