GS8161E18B Datasheet (GSI Technology) - (GS8161E18B

GS8161E18B, (GS8161E18B - GS8161E36B) Sync Burst SRAMs

Applications The GS8161E18B(T/D)/GS8161E32B(D)/GS8161E36B(T/D) is a 18,874,368-bit high performance synchronous SRAM with a 2-bit burst address counter.

Although of a type originally developed for Level 2 Cache applications supporting high performance CPUs, the device now finds application in synchr

GS8161E18B Features

* FT pin for user-configurable flow through or pipeline operation

* Dual Cycle Deselect (DCD) operation

* IEEE 1149.1 JTAG-compatible Boundary Scan

* 2.5 V or 3.3 V +10%/

* 10% core power supply

* 2.5 V or 3.3 V I/O supply www.DataSheet4U.com

* L