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HD74HC240 - Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)

Datasheet Summary

Description

The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G ).

Each enable independently controls 4 buffers.

This device does not have schmitt trigger inputs.

Features

  • High Speed Operation: tpd = 10 ns typ (CL = 50 pF) High Output Current: Fanout of 15 LSTTL Loads Wide Operating Voltage: VCC = 2 to 6 V Low Input Current: 1 µA max Low Quiescent Supply Current: ICC (static) = 4 µA max (Ta = 25°C) Function Table Inputs G H L L H L X Z : : : : A X H L high level low level irrelevant off (high-impedance) state of a 3-state output Output Y Z L H HD74HC240 Pin Arrangement 1G1 1A1 2Y4 1A2 2Y3 1A3 2Y2 1A4 2Y1 1 2 3.

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Datasheet Details

Part number HD74HC240
Manufacturer Hitachi Semiconductor
File Size 61.34 KB
Description Octal Buffers/Line Drivers/Line Receivers(with inverted 3-state outputs)
Datasheet download datasheet HD74HC240 Datasheet
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HD74HC240 Octal Buffers/Line Drivers/Line Receivers (with inverted 3-state outputs) Description The HD74HC240 is an inverting buffer and has two active low enables (1G and 2G ). Each enable independently controls 4 buffers. This device does not have schmitt trigger inputs.
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