and is subject to change without notice.
Hynix does not assume any responsibility for use of circuits described.
No patent licenses are implied.
Rev 1.2 / Sep.
2010 1 il;o;nar 512Mbit (16Mx32bit) Mobile SDR Memory H55S5122EFR Series / H55S5132EFR Series Document Title 4Bank x 4M x 32bits Synchrono
H55S5132EFR-A3M Features
* Standard SDRAM Protocol Clock Synchronization Operation - All the commands registered on positive edge of basic input clock (CLK) MULTIBANK OPERATION - Internal 4bank operation - During burst Read or Write operation, burst Read or Write for a different bank is performed. - During
H55S5122EFR-HynixSemiconductor.pdf
Datasheet Details
H55S5132EFR-A3M, H55S5122EFR
Hynix Semiconductor
949.60 KB
512mbit (16mx32bit) mobile sdr memory.
This datasheet PDF includes multiple part numbers: H55S5132EFR-A3M, H55S5122EFR.
Please refer to the document for exact specifications by model.
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