Datasheet Specifications
- Part number
- H57V2562GTR
- Manufacturer
- Hynix Semiconductor
- File Size
- 273.59 KB
- Datasheet
- H57V2562GTR_HynixSemiconductor.pdf
- Description
- 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O
Description
www.DataSheet4U.com 256Mb Synchronous DRAM based on 4M x 4Bank x16 I/O 256M (16Mx16bit) Hynix SDRAM Memory Memory Cell Array - Organized as 4banks .
Features
* Standard SDRAM Protocol Internal 4bank operation Power Supply Voltage : VDD = 3.3V, VDDQ = 3.3V All device pins are compatible with LVTTL interface Low Voltage interface to reduce I/O power 8,192 Refresh cycles / 64ms Programmable CAS latency of 2 orApplications
* which requires large memory density and high bandwidth. It is organized as 4banks of 4,194,304 x 16 I/O. Synchronous DRAM is a type of DRAM which operates in synchronization with input clock. The Hynix Synchronous DRAM latch each control signal at the rising edge of a basic input clock (CLK) and inpH57V2562GTR Distributors
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