HY57V641620HG Datasheet - Hynix Semiconductor

HY57V641620HG 4 Banks x 1M x 16Bit Synchronous DRAM

and is subject to change without notice. Hyundai Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.5/Jun.01 HY57V641620HG P IN C O N F IG U R A T IO N VDD DQ0 VDDQ DQ1 DQ2 VSSQ DQ3 DQ4 VDDQ DQ5 DQ6 VSSQ DQ7 VDD LDQM /WE /CAS /RAS /C.

HY57V641620HG 4 Banks x 1M x 16Bit Synchronous DRAM D E S C R IP T IO N The Hynix HY57V641620HG is a 67,108,864-bit CMOS Synchronous DRAM, ideally suited for the main memory applications which require large memory density and high bandwidth. HY57V641620HG is organized as 4banks of 1,048,576x16. HY57V641620HG is offering fully synchronous operation referenced to a positive edge of the clock. All inputs and outputs are synchronized with the rising edge of the clock input. The data paths are intern.

HY57V641620HG Features

* Single 3.3± 0 . 3 V power supply Note)

* Auto refresh and self refresh 4096 refresh cycles / 64ms Programmable Burst Length and Burst Type - 1, 2, 4, 8 or Full page for Sequential Burst All device pins are compatible with LVTTL interfac

HY57V641620HG_HynixSemiconductor.pdf