HY57V643220D - 4 Bank x 512K x 32-Bit SDRAM
of the package type in PACKAGE DIMENSION 1.Corrected : Lead range tolerance (Page : 13) History Draft Date May.
2004 July 2004 Sep.
2004 Sep.
2005 Remark Preliminary DataSheet4U.com DataShee This document is a general product description and is subject to change without notice.
Hynix does not
HY57V643220D Features
* Voltage : VDD, VDDQ 3.3V supply voltage All device pins are compatible with LVTTL interface JEDEC standard 400mil 86pin TSOP-II with 0.5mm of pin pitch
* Auto refresh and self refresh 4096 Refresh cycles / 64ms P
