HY5DU121622DTP Datasheet (Hynix Semiconductor)

HY5DU121622DTP, 512Mb DDR SDRAM

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Rev.

0.1 / Jan 2007 1 www.DataSheet.in 1Preliminary HY5DU12822DTP HY5DU121622DTP Revision History Revision No.

0.1 History First version f

HY5DU121622DTP Features

* VDD, VDDQ = 2.3V min ~ 2.7V max (Typical 2.5V Operation +/- 0.2V for DDR266, 333) VDD, VDDQ = 2.4V min ~ 2.7V max (Typical 2.6V Operation +0.1/- 0.2V for DDR400 product ) All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operati