Description
www.DataSheet4U.com HY5DU56422BT-D4/D43 HY5DU56822BT-D4/D43 256M-P DDR SDRAM HY5DU56422BT-D4/D43 HY5DU56822BT-D4/D43 This document is a general pro.
Features
* VDD/VDDQ = 2.5 ~ 2.7V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional data sApplications
* which requires large memory density and high bandwidth. The Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data stroHY5DU56822BT-D4 Distributors
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