HY5DU56822CF - (HY5DU56xxxC(L)F) 256M DDR SDRAM
and is subject to change without notice.
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Rev.
0.1/ Nov.
2003 1 w w w .D at h S a t e e 4U .
m o c HY5DU56422C(L)F HY5DU56822C(L)F HY5DU561622C(L)F Revision History Revisi
HY5DU56822CF Features
* VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional da