HY5DV281622DT Datasheet - Hynix Semiconductor

HY5DV281622DT 128M(8Mx16) GDDR SDRAM

and is subject to change without notice. Hynix Electronics does not assume any responsibility for use of circuits described. No patent licenses are implied. Rev. 0.5 / Aug. 2003 HY5DV281622DT Revision History Revision No. 0.1 0.2 0.3 0.4 0.5 History Defined Preliminary Specification Defined Targe.

HY5DV281622DT Features

* 3.3V for VDD and 2.5V for VDDQ power supply All inputs and outputs are compatible with SSTL_2 interface JEDEC standard 400mil 66pin TSOP-II with 0.65mm pin pitch Fully differential clock inputs (CK, /CK) operation Double

HY5DV281622DT_HynixSemiconductor.pdf