* CMOS Process Technology
* 2M x 16 bit Organization
* TTL compatible and Tri-state outputs
* Deep Power Down : Memory cell data hold invalid
* Standard pin configuration : 48-FBGA(6mmX8mm)
* Data mask function by /LB, /UB
* Separated I/O Power
HY64UD16322A Datasheet (294.19 KB)
HY64UD16322A
Hynix Semiconductor
294.19 KB
2m x 16 bit low low power 1t/1c pseudo sram.
www.DataSheet4U.com HY64UD16322A Series Document Title 2M x 16 bit Low Low Power 1T/1C Pseudo SRAM Revision history Revision No. History 1.0 1.1 In.
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