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HY5DU56422DTP (HY5DU56x22DTP) 256M DDR SDRAM

HY5DU56422DTP Description

www.DataSheet4U.com HY5DU56422D(L)TP HY5DU56822D(L)TP HY5DU561622D(L)TP 256M DDR SDRAM HY5DU56422D(L)TP HY5DU56822D(L)TP HY5DU561622D(L)TP This doc.
and is subject to change without notice.

HY5DU56422DTP Features

* VDD, VDDQ = 2.5V +/- 0.2V All inputs and outputs are compatible with SSTL_2 interface Fully differential clock inputs (CK, /CK) operation Double data rate interface Source synchronous - data transaction aligned to bidirectional da

HY5DU56422DTP Applications

* which requires large memory density and high bandwidth. The Hynix 256Mb DDR SDRAMs offer fully synchronous operations referenced to both rising and falling edges of the clock. While all addresses and control inputs are latched on the rising edges of the CK (falling edges of the /CK), Data, Data stro

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Datasheet Details

Part number
HY5DU56422DTP
Manufacturer
Hynix Semiconductor
File Size
450.52 KB
Datasheet
HY5DU56422DTP_HynixSemiconductor.pdf
Description
(HY5DU56x22DTP) 256M DDR SDRAM

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