IS61QDB41M18A Datasheet, Sram, ISSI

IS61QDB41M18A Features

• Sram DESCRIPTION OCTOBER 2014
• 512Kx36 and 1Mx18 configuration available.
• On-chip Delay-Locked loop (DLL) for wide data valid window.
• Separate independent rea

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IS61QDB41M18A

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ISSI

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📄 Datasheet

Description:

18mb quad (burst 4) synchronous sram. OCTOBER 2014

512Kx36 and 1Mx18 configuration available.

On-chip Delay-Locked loop (DLL) for wide data valid win

IS61QDB41M18A Application

• Applications where the failure or malfunction of the product can reasonably be expected to cause failure of the life support system or to significan

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IS61QDB41M18A

ISSI

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