Datasheet4U Logo Datasheet4U.com
5 views

IS61QDPB24M18A1 Datasheet - ISSI

72Mb QUADP (Burst 2) Synchronous SRAM

IS61QDPB24M18A1 Features

* 2Mx36 and 4Mx18 configuration available.

* On-chip Delay-Locked Loop (DLL) for wide data valid window.

* Separate independent read and write ports with concurrent read and write operations.

* Synchronous pipeline read with EARLY write operation.

* Double Data Rate (DDR) interfa

IS61QDPB24M18A1 General Description

at page 6 for each ODT option. DESCRIPTION The and are synchronous, high- performance CMOS static random access memory (SRAM) devices. These SRAMs have separate I/Os, eliminating the need for high-speed bus turnaround. The rising edge of K clock initiates the read/write operation, and all int.

IS61QDPB24M18A1 Datasheet (607.77 KB)

Preview of IS61QDPB24M18A1 PDF

Datasheet Details

Part number:

IS61QDPB24M18A1

Manufacturer:

ISSI

File Size:

607.77 KB

Description:

72mb quadp (burst 2) synchronous sram.

📁 Related Datasheet

IS61QDPB24M18A 72Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB24M18A2 72Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB24M18C 72Mb QUADP Synchronous SRAM (ISSI)

IS61QDPB24M18C1 72Mb QUADP Synchronous SRAM (ISSI)

IS61QDPB24M18C2 72Mb QUADP Synchronous SRAM (ISSI)

IS61QDPB21M18A 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB21M18A1 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB21M18A2 18Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB21M36A 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

IS61QDPB21M36A1 36Mb QUADP (Burst 2) Synchronous SRAM (ISSI)

TAGS

IS61QDPB24M18A1 72Mb QUADP Burst Synchronous SRAM ISSI

Image Gallery

IS61QDPB24M18A1 Datasheet Preview Page 2 IS61QDPB24M18A1 Datasheet Preview Page 3

IS61QDPB24M18A1 Distributor