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NDL16PFJ - 1Gb (x16) - DDR3/3L Synchronous DRAM

Datasheet Summary

Features

  • including full backward compatibility to DDR3. All of the control and address inputs are synchronized with a pair of externally supplied differential clocks and inputs are latched at the cross point of differential clocks (CK rising and CK# falling). All I/Os are synchronized with differential DQS pair in a source synchronous fashion. These devices operate with a single +1.35V -0.067.

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Datasheet Details

Part number NDL16PFJ
Manufacturer Insignis
File Size 2.41 MB
Description 1Gb (x16) - DDR3/3L Synchronous DRAM
Datasheet download datasheet NDL16PFJ Datasheet
Additional preview pages of the NDL16PFJ datasheet.

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Full PDF Text Transcription

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1Gb (x16) - DDR3/DDR3L Synchronous DRAM (1600) Preliminary Datasheet 64M x 16 bit DDR3/3L Synchronous DRAM (1600) Overview The 1Gb Double-Data-Rate-3 (DDR3/3L) SDRAM is double data rate architecture to achieve high speed double-datarate transfer rates of up to 1600 Mb/sec/pin for general applications. It is internally configured as an eight bank DRAM. The 1Gb chip is organized as 8Mbit x 16 I/Os x 8 bank devices. These synchronous devices achieve high speed doubledata-rate transfer rates of up to 1600 Mb/sec/pin for general applications. The chip is designed to comply with all DDR3L DRAM key features, including full backward compatibility to DDR3.
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