* Extended Data-Out (EDO) Page Mode access cycle
* TTL compatible inputs and outputs; tristate I/O
* Refresh Interval: Refresh Mode: 1,024 cycles /16 ms RAS-Only, CAS-before-RAS (CBR), and Hidden Self refresh Mode - 1,024 cycles / 128ms
* JEDEC standard pinout
IC42S16160 Datasheet (662.89 KB)
IC42S16160
Integrated Circuit Solution
662.89 KB
1m x 16bit dynamic ram.
IC41C16100S IC41LV16100S Document Title 1M x 16 bits Dynamic RAM with EDO Page Mode Revision History Revision No 0A 0B 0C 0D History Initial Draft R.
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