IC42S16160 Datasheet (Integrated Circuit Solution)

IC42S16160, 1M x 16bit Dynamic Ram

The ICSI IC41C16100S and IC41LV16100S are 1,048,576 x KEY TIMING PARAMETERS Parameter Max.

RAS Access Time (tRAC) Max.

CAS Access Time (tCAC) Max.

Column Address Access Time (tAA) Min.

EDO Page Mode Cycle Time (tPC) Min.

Read/Write Cycle Time (tRC) -45 45 11 22 16 77 PIN CONFIGURATIONS 50(44)-Pin

IC41C16100S IC41LV16100S Document Title 1M x 16 bits Dynamic RAM with EDO Page Mode Revision History Revision No 0A 0B 0C 0D History Initial Draft Revise for typographic Add Pb-free package Change tCOH from 5ns to 4ns Draft Date June 5,2001 November 9,2001 May 06,2004 November 26,2004 Remark The attached datasheets are provided by ICSI.

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IC42S16160 Features

* Extended Data-Out (EDO) Page Mode access cycle

* TTL compatible inputs and outputs; tristate I/O

* Refresh Interval: Refresh Mode: 1,024 cycles /16 ms RAS-Only, CAS-before-RAS (CBR), and Hidden Self refresh Mode - 1,024 cycles / 128ms

* JEDEC standard pinout