ICS9112-18 Datasheet - Integrated Circuit Systems

ICS9112-18 Zero Delay / Low Skew Buffer

w w The ICS9112-18 is a low jitter, low skew, high performance Phase Lock Loop (PLL) based zero delay buffer for high speed applications. Based on ICS’ proprietary low jitter PLL techniques, the device provides eight low skew outputs at speeds up to 160 MHz at 3.3V. The ICS9112-18 includes a bank.

ICS9112-18 Features

* Packaged in 16 pin SOIC Zero input-output delay Four 1X outputs plus four 1/2X outputs Output to output skew is less than 250 ps Output clocks up to 160 MHz at 3.3V Ability to generate 2X the input Full CMOS outputs with 18 mA out

ICS9112-18_IntegratedCircuitSystems.pdf