ICS952702 Datasheet - Integrated Circuit Systems

ICS952702 Programmable Timing Control Hub for K7 System

The ICS952702 is a two chip clock solution for desktop designs using SIS 746 style chipsets. When used with a zero delay buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications it provides all the necessary clocks signals for such a system. The ICS952702 is part of a whole new l.

ICS952702 Features

* 1 - Pair of differential open drain CPU outputs

* 1 - Single-ended open drain CPU output

* 8 - PCICLK @ 3.3V including 2 PCI clock free running

* 2 - AGPCLK @ 3.3V

* 3 - REF @ 3.3V

* 2 - ZCLK @ 3.3V

* 2 - IOAPIC @ 2.5V

* 1 - 12_48MHz

ICS952702_IntegratedCircuitSystems.pdf

ICS952702 Datasheet Preview — Preview of ICS952702 PDF

Datasheet Details

Part number:

ICS952702

Manufacturer:

Integrated Circuit Systems

File Size:

149.47 KB

Description:

Programmable timing control hub for k7 system.

ICS952702 Distributor

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ICS952702 ICS952702 Programmable Timing Control Hub for System Integrated Circuit Systems