ICS952802 Datasheet (Integrated Circuit Systems) - Programmable Timing Control Hu for P4 processor

ICS952802, Programmable Timing Control Hu for P4 processor

The ICS952802 is a two chip clock solution for desktop designs using SIS 755/760 style chipsets.

When used with a zero delay buffer such as the ICS9179-16 for PC133 or the ICS93735 for DDR applications it provides all the necessary clocks signals for such a system.

The ICS952802 is part of a whole n

ICS952802 Features

* 2 - Pairs of differential push-pull K8CPU outputs

* 10 - PCICLK @ 3.3V

* 2 - AGPCLK @ 3.3V

* 3 - REF @ 3.3V

* 2 - ZCLK @ 3.3V

* 1 - 24_48MHz @ 3.3V

* 1 - 12_48MHz @ 3.3V

* 1 - PCI_12MHz @ 3.3V Key Specifications:

* CPU Output