MT48LC2M32B2 - SDR SDRAM

MICRON

MT48LC2M32B2 Datasheet Preview — Preview of MT48LC2M32B2 PDF

Datasheet Details

Part number	MT48LC2M32B2
Manufacturer	MICRON
File Size	3.60 MB
Description	SDR SDRAM
Datasheet	MT48LC2M32B2_MICRON.pdf

MT48LC2M32B2 Product details

Description

7 Automotive Temperature 7 Functional Block Diagrams 8 Pin and Ball Assignments and Descriptions 9 Package Dimensions 12 Temperature and Thermal Impedance 14 Electrical Specifications 17 Electrical Specifications IDD Parameters 19 Electrical Specifications AC Operating Conditions 21 Functional Description 24 Commands 25 COMMAND INHIBIT 25 NO OPERATION (NOP) 26 LOAD MODE REGISTER (LMR) 26 ACTIVE

Features

Features.
PC100-compliant.
Fully synchronous; all signals registered on positive edge of system clock.
Internal pipelined operation; column address can be changed every clock cycle.
Internal banks for hiding row access/precharge.
Programmable burst lengths: 1, 2, 4, 8, or full page.
Auto precharge, includes concurrent auto precharge and auto refresh modes.
Self refresh mode (not available on AT devices).
Auto refresh.

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Published: Jul 18, 2005 |