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SP8400KGMPES Very Low Phase Noise Synthesiser Divider

SP8400KGMPES Description

SP8400 Very Low Phase Noise Synthesiser Divider DS3739 - 2.1 April 1994 The SP8400 is a very low phase noise programmable divider which is based on a.
synthesiser divider The divider is based on a divide by 8/9 modulus prescaler, and a 12 stage control counter.

SP8400KGMPES Features

* s Very low Phase Noise (Typically -156dBc/Hz at 1kHz offset) s Supply Voltage 5V ABSOLUTE MAXIMUM RATINGS Supply Voltage Output Current Storage Temperature Range Maximum Clock Input Voltage 6.5V 20mA -55°C to +125°C 2.5V p-p MP28 Fig.1 Pin connections - top view ORDERING INFORMATION SP8400 KG MP

SP8400KGMPES Applications

* , and a maximum division ratio of 4103. Special circuit techniques have been used to reduce the phase noise considerably below that produced by standard dividers. The data inputs are CMOS or TTL compatible. The SP8400 is packaged in a 28 pin plastic SO package. M2 M1 M0 VCC +5V GND CLOCK INPUT CLOCK

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