M2S56D30TP-75 Datasheet, Dram, Mitsubishi

M2S56D30TP-75 Features

• Dram - Vdd=Vddq=2.5v±0.2V - Double data rate architecture; two data transfers per clock cycle - Bidirectional, data strobe (DQS) is transmitted/received with data - Differential clock inputs

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M2S56D30TP-75

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Mitsubishi

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📄 Datasheet

Description:

256m double data rate synchronous dram. M2S56D20TP is a 4-bank x 16777216-word x 4-bit, M2S56D30TP is a 4-bank x 8388608-word x 8-bit, double data rate synchronous DRAM, wit

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M2S56D30TP-75

Mitsubishi

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