MPC954 Datasheet - Motorola

MPC954 LOW VOLTAGE PLL CLOCK DRIVER

MOTOROLA SEMICONDUCTOR TECHNICAL DATA Order this document by MPC954/D Low Voltage PLL Clock Driver The MPC954 is a 3.3V compatible, PLL based zero delay buffer targeted for high performance clock tree designs. With 11 outputs at frequencies of up to 100MHz and output skews of 200ps the MPC954 is ideal for the most demanding clock tree designs. The devices employ a fully differential PLL design to minimize cycle to cycle and phase jitter. MPC954 Fully Integrated PLL.

MPC954 Features

* to minimize the susceptibility to power supply noise (isolated power and grounds and fully differential PLL) there still may MOTOROLA 4 TIMING SOLUTIONS MPC954 by the impedance mismatch seen looking into the driver. The parallel combination of the 43Ω series resistor plus the output impedance do

MPC954 Datasheet (98.19 KB)