Description
MOTOROLA SEMICONDUCTOR TECHNICAL DATA Low Voltage PLL Clock Driver The MPC950/951 are 3.3V compatible, PLL based clock driver devices targeted for h.
Features
* allow for the MPC951 to be used as a zero delay, low skew fanout buffer. In addition, the external feedback allows for a wider variety of input
* to
* output frequency relationships. The MPC951 REF_SEL pin allows for the selection of an alternate LVCMOS input clock to be used as a test c
Applications
* Info section). MOTOROLA
4
TIMING SOLUTIONS BR1333
* Rev 6
MPC950 MPC951
PLL INPUT REFERENCE CHARACTERISTICS (TA = 0 to 70°C)
Symbol tr, tf fref fXtal frefDC Characteristic TCLK Input Rise/Falls Reference Input Frequency Crystal Oscillator Frequency Reference Input Duty Cycle Note 1. 10 2
