* allow for the MPC951 to be used as a zero delay, low skew fanout buffer. In addition, the external feedback allows for a wider variety of input
* to
* output frequency relationships. The MPC951 REF_SEL pin allows for the selection of an alternate LVCMOS input clock to be used as a test c
MPC950
Motorola
149.32 KB
(mpc950 / mpc951) low voltage pll clock driver.
MOTOROLA
SEMICONDUCTOR TECHNICAL DATA
Low Voltage PLL Clock Driver
The MPC950/951 are 3.3V compatible, PLL based clock driver devices targeted for h.
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