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BSP120 N-channel enhancement mode vertical D-MOS transistor

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Description

DISCRETE SEMICONDUCTORS DATA SHEET BSP120 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconducto.
N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and designed for use as a line current interrupter in telephone se.

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Features

* Direct interface to C-MOS, TTL, etc.
* High-speed switching
* No secondary breakdown QUICK REFERENCE DATA Drain-source voltage Drain-current (DC) Drain-source ON-resistance ID = 250 mA; VGS = 10 V Gate threshold voltage PINNING - SOT223 1 = gate 2 = drain 3 = source 4 = dra

Applications

* BSP120 This data sheet contains target or goal specifications for product development. This data sheet contains preliminary data; supplementary data may be published later. This data sheet contains final product specifications. These products are not designed for use in life support appliances, devi

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BSP120 N-channel enhancement mode vertical D-MOS transistor NXP
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