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BSP106 Datasheet N-channel Enhancement Mode Vertical D-mos Transistor

Manufacturer: NXP Semiconductors

Overview: DISCRETE SEMICONDUCTORS DATA SHEET BSP106 N-channel enhancement mode vertical D-MOS transistor Product specification File under Discrete Semiconductors, SC13b April 1995 Philips Semiconductors Product specification.

General Description

N-channel enhancement mode vertical D-MOS transistor in a miniature SOT223 envelope and intended for use in relay, high-speed and line transformer drivers.

PINNING - SOT223 PIN 1 2 3 4 gate drain source drain 1 Top view 2 3 MAM054 BSP106 QUICK REFERENCE DATA SYMBOL VDS ID RDS(on) VGS(th) PARAMETER drain-source voltage drain current drain-source on-resistance gate-source threshold voltage CONDITIONS − DC value ID = 200 mA VGS = 10 V ID = 1 mA VGS = VDS MAX.

60 425 4 3 UNIT V mA Ω V PIN CONFIGURATION handbook, halfpage 4 d DESCRIPTION g s Fig.1 Simplified outline and symbol.

Key Features

  • Very low RDS(on).
  • Direct interface to C-MOS, TTL, etc.
  • High-speed switching.
  • No secondary breakdown.

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