* ORDERING INFORMATION GENERAL DESCRIPTION BLOCK DIAGRAM PINNING INFORMATION FUNCTIONAL DESCRIPTION General CPU timing Overview on the different clocks used within the PCA5010 Memory organization Addressing I/O facilities Timer/event counters I2C-bus serial I/O Serial interface SIO0: UART 76.8 kHz osc
PCA5010
627.46 KB
Pager baseband controller.
INTEGRATED CIRCUITS
DATA SHEET
PCA5010 Pager baseband controller
Product speciļ¬cation File under Integrated Circuits, IC17 1998 Nov 02
Philips Semi.
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