NT5DS32M16CG Datasheet (Nanya Techology)

NT5DS32M16CG, 512Mb DDR SDRAM

Die C of 512Mb SDRAM devices based using DDR interface.

They are all based on Nanya’s 90 nm design process.

The 512Mb DDR SDRAM is a high-speed CMOS, dynamic random-access memory containing 536,870,912 bits.

It is internally configured as a quad-bank DRAM.

The 512Mb DDR SDRAM uses a double-data-rate

NT5DS32M16CG Features

* DDR 512M bit, Die C, based on 90nm design rules

* Double data rate architecture: two data transfers per clock cycle

* Bidirectional data strobe (DQS) is transmitted and received with data, to be used in capturing data at the receiver

* DQS is edge-aligned with data