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CGS700V Commercial Low Skew PLL 1 to 9 CMOS Clock Driver

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Description

>e.oo..n ~National Q oC!J Semiconductor PRELIMINARY CGS700V Commercial Low Skew PLL 1 to 9 CMOS Clock Driver General .
CGS700 is an off the shelf clock driver specifically designed around the PowerPc™ architecture.

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Datasheet Specifications

Part number
CGS700V
Manufacturer
National Semiconductor
File Size
180.74 KB
Datasheet
CGS700V-NationalSemiconductor.pdf
Description
Commercial Low Skew PLL 1 to 9 CMOS Clock Driver

Features

* Guaranteed and tested: - 500 ps pin-to-pin skew (toSHL and toSLH) on 1X outputs
* Output buffer of nine drivers for large fanout
* 25 MHz-160 MHz output frequency range
* Outputs operating at 4X, 2X, 1X of the reference fre- quency for multi-frequency bus applicatio

Applications

* Selectable output frequency
* TRI-STATE output control with the PLL is in the lock state
* Internal loop filter to reduce noise and jitter
* Separate analog and digital Vee and Ground pins
* Low frequency test mode by disabling the PLL
* Implemented

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