CGS702V - Commercial Low Skew PLL 1 to 9 CMOS Clock Driver

National Semiconductor

CGS702V Datasheet Preview — Preview of CGS702V PDF

Datasheet Details

Part number	CGS702V
Manufacturer	National Semiconductor ↗
File Size	181.72 KB
Description	Commercial Low Skew PLL 1 to 9 CMOS Clock Driver
Datasheet	CGS702V_NationalSemiconductor.pdf

CGS702V Product details

Description

The CGS702 is an off-the-shelf clock driver specifically designed for today’s high speed processors It provides low skew outputs which are produced at different frequencies from three fixed input references The CGS702 is a reduced EMI version of the CGS700 The XTALIN input pin is designed to be driven from three distinct crystal oscillators running at 25 MHz 33 MHz or 40 MHz The PLL using a charge pump and an internal loop filter multiplies this input frequency to create a maximum output frequen

Features

Y Guaranteed and tested 500 ps pin-to-pin skew (TOSHL and TOSLH) on 1x outputs PentiumTM and PowerPCTM compatible Output buffer of nine drivers for large fanout 25 MHz.
160 MHz output frequency range Outputs operating at 4x 2x 1x of the reference frequency for multi-frequency bus.

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Published: Mar 23, 2005 |