DM74LS197 Datasheet - National Semiconductor

DM74LS197 - Presettable Binary Counters

The ’LS197 ripple counter contains divide-by-two and divide-by-eight sections which can be combined to form a modulo-16 binary counter State changes are initiated by the falling edge of the clock The ’LS197 has a Master Reset (MR) input which overrides all other inputs and asynchronously forces all

DM74LS197 Features

* Y Y Y High counting rates Typically 70 MHz Asynchronous preset Asynchronous master reset Connection Diagram Dual-In-Line Package TL F 10180

* 1 Order Number DM74LS197M or DM74LS197N See NS Package Number M14A or N14A Mode Select Table Pin Names CP0 CP1 MR P0

* P3 PL Q0 Q1

DM74LS197_NationalSemiconductor.pdf