DS90LV001 Datasheet - National Semiconductor

DS90LV001 3.3V LVDS-LVDS Buffer

The DS90LV001 LVDS-LVDS Buffer takes an LVDS input signal and provides an LVDS output signal. In many large systems, signals are distributed across backplanes, and one of the limiting factors for system speed is the ’stub length’ or the distance between the transmission line and the unterminated rec.

DS90LV001 Features

* n n n n n n n Single +3.3 V Supply LVDS receiver inputs accept LVPECL signals TRI-STATE outputs Receiver input threshold < ± 100 mV Fast propagation delay of 1.4 ns (typ) Low jitter 800 Mbps fully differential data path 100 ps (typ) of pk-pk jitter with PRBS = 223

* 1 data pattern at 800 Mbps

DS90LV001_NationalSemiconductor.pdf