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DS90LV018A 3V LVDS Single CMOS Differential Line Receiver

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Description

DS90LV018A 3V LVDS Single CMOS Differential Line Receiver June 1998 DS90LV018A 3V LVDS Single CMOS Differential Line Receiver General .
The DS90LV018A is a single CMOS differential line receiver designed for applications requiring ultra low power dissipation, low noise and high data ra.

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Datasheet Specifications

Part number
DS90LV018A
Manufacturer
National Semiconductor
File Size
241.91 KB
Datasheet
DS90LV018A_NationalSemiconductor.pdf
Description
3V LVDS Single CMOS Differential Line Receiver

Features

* n n n n n n n n n n n n n > 400 Mbps (200 MHz) switching rates 50 ps differential skew (typical) 2.5 ns maximum propagation delay 3.3V power supply design Flow-through pinout Power down high impedance on LVDS inputs Low Power design (18mW @ 3.3V static) Interoperable with existing 5V LVDS networks

Applications

* requiring ultra low power dissipation, low noise and high data rates. The device is designed to support data rates in excess of 400 Mbps (200 MHz) utilizing Low Voltage Differential Signaling (LVDS) technology. The DS90LV018A accepts low voltage (350 mV typical) differential input signals and transl

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