MC100E156 - 3-BIT 4:1 MUX-LATCH
The MC10E/100E156 contains three 4:1 multiplexers followed by transparent latches with differential outputs.
When both Latch Enables (LEN1, LEN2) are LOW, the latch is transparent, and output date is controlled by the multiplexer select controls (SEL0, SEL1).
A logic HIGH on either LEN1 or LEN2 (or
MC100E156 Features
* http://onsemi.com
* 950 ps Max. D to Output 850 ps Max. LEN to Output Differential Outputs Asynchronous Master Reset Dual Latch-Enables PECL Mode Operating Ra
